Book Review of
SILICON PROCESSING FOR THE VLSI ERA - Vol. 4
Deep-Submicron Process Technology

This Review was Published in the MRS Bulletin, Nov. 2003, p. 867
Reprinted with Permission of the Materials Research Society

Reviewer: PROFESSOR RICHARD B. FAIR
Department of Electrical Engineering, Duke University

Dr. Fair is a Fellow of the IEEE and of the ECS. He is recipient of the IEEE Third Millennium Medal (2000) & the 2003 Solid-State Science & Technology Prize & Medal from the ECS. He is also a Former Editor of the Proceedings of the IEEE.

"Volume 4 of Stanley Wolf's Series on SILICON PROCESSING FOR THE VLSI ERA is an impressive compilation of processing technology descriptions and device structures used in deep-submicron (0.18-micron and smaller) integrated circuits. The content of Volume 4 is aimed at the practicing semiconductor process or device engineer who would benefit from a single-reference compilation of published work in the field."

"The 'integration' of material from over 900 references and the presentation of that material in a coherent way form the primary value of this book. Key topics included in the book are device structures (e.g., MOSFETs, shallow-trench isolation, heterojunction bipolar transistors, and silicon-on-insulator CMOS), and fabrication processes (e.g., CMP, thin gate dielectrics, low-k dielectrics, high-k dielectrics, advanced lithography, multilevel interconnects, and copper technology."

"This is the first book written exclusively on deep-submicron device structures and technology. The book is also unique in its approach at integrating the requirements for improved semiconductor device performance with fabrication technology. However, Vol. 4 is different from the previous three volumes written by Wolf."

"I have used Volume I (1st & 2nd Editions) in my graduate courses on silicon processing since 1986. Despite the large number of books on silicon fabrication technology, Wolf's Volume I contains fundamentals and basics that are best suited for such graduate courses."

"Wolf has a unique ability to read the literature and then to compile relevant information in an understandable format for others to digest. Volume 4, which does not overlap much with the other three volumes, is more about technology than fundamentals."

"For example, Chap. 8 is on chemical-mechanical polishing (CMP) and covers 120 pages with 105 references. CMP is currently a key technology and is widely practced by semiconductor manufacturers. Chapter 8 mainly covers practical issues such as CMP equipment, cleaning methods, metrology, polisher tool reliability, and processes for polishing various materials such as metals and dielectrics. All of these topics are suitable for a reference book on the subject and less suitable for a textbook."

"Chapter 12 on multilevel interconnections for ULSI is only about 25 pages long and covers design issues and historical aspects of interconnects. This significant topic is treated more completely in Volumes 1 and 2."

"Perhaps one of the most important unique topics covered is copper interconnect process technology in Chapter 16. Wolf gives a greatly expanded treatise on copper (76 pages) over what is in Volume 1 (2nd Edition). Eighty-five references are cited for additional investigation."

"Thus, the true value of SILICON PROCESSING FOR THE VLSI ERA - Volume 4 is twofold: (1) It serves as a reference for gaining an overview on how today's semiconductor technologies are practiced, and (2) the book is also a pointer to additional sources of background and details in the extensive and scientific literature cited at the end of each chapter."