CLICK HERE to Return
to the HOME PAGE
List Price: $229.95
You Save: $30.00
(13% Discount)

Your Price: $199.95
Always Get the
LOWEST PRICES
When You Buy
Direct from Lattice Press!
Save Even More!
Buy 2 or More
LATTICE PRESS Books
& Get:
FREE SHIPPING!
(U.S. & Canada Only)
Silicon Processing for the VLSI Era:
Volume-4 - Deep-Submicron Process Technology

by Stanley Wolf ©2002 826 pp ISBN: 0-9616721-7-X
Here is Dr. Wolf's Trailblazing-Guide to the State-of-the Art
SILICON PROCESSING FOR THE VLSI ERA - Vol. 4

"The Highest Profit-Margins in the Semiconductor Industry
are Found at the Leading Edge of Technology ...
Let Vol. 4 on Deep-Submicron Processing Take You There!"
Have you been searching for a book on the Advanced IC Production-Technologies of the 21st Century? Look no more! One is finally here!

ICs have evolved below 0.13-µm. New processes have been developed to fabricate such deep-submicron devices. As a Microelectronic Professional, you will need to learn about them. The new Vol. 4 from LATTICE PRESS is the only
book written that deals exclusively with such new process technologies!
CLICK HERE to Read More About Vol. 4


"This is the first book written solely on deep-submicron device structures and technology ... Wolf's unique ability is to read the literature & compile relevant information in an understandable format for others. This "integration" of over 900 references into a clear & coherent presentation is the primary-value of Wolf's latest treatise." MRS Bulletin, November 2003
CLICK HERE to Read More Reviews of Vol. 4

CONTENTS: SILICON PROCESSING FOR THE VLSI ERA - Vol. 4

Ch. 1 The Evolution of the Structure of MOSFETs - 16 pp; Ch. 2 300-mm Silicon Wafers - 58 pp; Ch. 3 Gate Dielectrics: Thin Gate Oxides - 70 pp; Ch. 4 High-k Deilectrics - 36 pp; Ch. 5 The Structure of Deep-Submicron MOSFETs - 56 pp; Ch. 6 Deep-Submicron Lithography I: Photoresists - 32 pp; Ch. 7 Deep-Submicron Lithography II: Optics and Hardware - 54 pp; Ch. 8 Chemical-Mechanical Polishing (CMP) - 120 pp; Ch. 9 Shallow-Trench Isolation (STI) - 42 pp; Ch. 10 Silicon-Germanium (Si:Ge) Process Technology - 26 pp; Ch. 11 Silicon-on-Insulator Technology (SOI) - 72 pp; Ch. 12 Multilevel Interconnects for ULSI - 30 pp;Ch. 13 Polycides and Salicides of TiSi2, CoSi2, and NiSi - 36 pp; Ch. 14 Low-k Dielectrics - 42 pp; Ch. 15 Dual-Damascene Interconnects - 40 pp; Ch. 16 Copper Interconnect Process Technology - 76 pp.
CLICK HERE to Download the Complete 14-pp Table of Contents - Vol. 4




Home | MicrochipManuf | Vol.1 | Vol.2 | Vol.3 | Vol.4 |
LatticePressSeminars | Contact & Shipping Info | Our Guarantee & Privacy Policy
LATTICE PRESS Post Office Box 340 Sunset Beach CA 90742 USA
Website: www.latticepress.com
Ph: (714) 840-5010; FAX: (562) 592-1976

© 2004 by LATTICE PRESS Sunset Beach CA - All Rights Reserved.
Page Table of Contentss Nav Button Page FAQs Nav Button Page Reviews Nav Button Page Look Inside Book Nav Button Page Preface Nav Button No Text
Lattice Press Book Photo Lattice Press Banner
Page Banner
Over State Headline Bar